Principal Engineer/ Senior Engineer/ Engineer, Digital Logic Design

Ref: umec20200202(a/b)

Responsibilities:

    • Research and development in digital IC/FPGA implementation for machine learning and/or deep neural network applications;
    • System functional specification, resources evaluation, IC architecture definition, micro-architecture specification and review, RTL implementation, logic synthesis and timing analysis for digital IC design;
    • Micro-architecture design, RTL coding for FPGA implementation and prototyping;
    • Optimization for hardware design implementation;
    • Module-level and/or top-level verification.

Requirements:

  • Bachelor’s Degree in Computer Engineering/Electrical Engineering/Information Engineering or related fields with 6+ years’ experience, or Master’s Degree with 3+ years’ experience, or PhD holder in related area. Candidates with less experience will be considered position of Engineer;
  • Hands-on experience in micro-architecture design, RTL coding, logic synthesis, functional verification, formal verification and timing analysis;
  • Hands-on FPGA prototyping and FPGA implementation;
  • Proficient in Verilog language;
  • Familiar with FPGA/SoC design methodologies and latest EDA tools;
  • SystemVerilog verification experience preferred;
  • Matlab/C, Perl, Cshell and Unix / Linux skills preferred;
  • Knowledge on computer vision and machine learning is a plus.

How to apply?

Interested parties please send your application to hr@umechk.com by quoting reference number with detailed resume including current and expected salary by email. Only short-listed candidates will be contacted.

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