AI Chiplet SoC

To provide smaller and more energy-efficient AI chips for edge AI applications

Technologies Involved

  • Chiplet-based design technology
  • Extremely low-bit quantisation method → achieve over 16-time weight reduction
  • Patented compression-retain technique → reduce 20% memory usage without accuracy loss


  • Tiny package (9.5mm X 6.8mm)
  • Multi-level reconfigurable (from chip-to-chip level to AI core level)
  • Ultra-low power consumption
  • Highly compatible with different types of smart sensors
  • Shorter time to market

Portable AI applications, e.g. voice-controlled office automation system, intelligent health monitoring system, smart watches, shopping suggestion mirrors, etc.

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